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Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。
pdf 的说明文件-CPLD control 8-32M sdram controller maxII epm570 realize. pdf documentation
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Size: 192512 |
Author: 王可见 |
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Description: Altera Sdram IP 源码,VHDL写的-Altera Sdram IP source code, VHDL written
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Size: 781312 |
Author: 张敏 |
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Description: vhdl 编写的sdram controler, 双通道-VHDL prepared sdram controler, dual-channel
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Size: 3072 |
Author: chenchungen |
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Description: verilog 代码,读写SDRAM 不带仿真,需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
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Size: 19935232 |
Author: ch |
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Description: DE2开发板提供的四端口SDRAM驱动,用户不需要对SDRAM直接操作,把SDRAM对用户透明化-DE2 development board provides four-port SDRAM drive, users do not need to direct the operation of the SDRAM, the SDRAM transparent to users
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Size: 15360 |
Author: 旺仔 |
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Description: ddr sdram 的vhdl实现,包括各个模块的实现以及仿真文件-ddr sdram realization of VHDL, including the realization of each module as well as the simulation file
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Size: 1021952 |
Author: shroy |
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Description: 标准SRD SDRAM控制器参考设计,altera提供
Verilog代码,带有使用手册,大家试试交流一下
-Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
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Size: 776192 |
Author: 费尔德 |
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Description: sdram的测试程序 和读写程序 vhdl语言编写的-SDRAM testing procedures and to read and write procedures VHDL language
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Size: 93184 |
Author: 朱宝军 |
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Description: 在FPGA硬件上实现计算机通过串口发数据给FPGA,数据保存到SDRAM中,然后又返回给计算机串口。-In FPGA hardware realize computer data through the serial port issued to FPGA, the data saved to SDRAM, and then again back to the computer serial port.
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Size: 5217280 |
Author: huanghui |
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Description: artera 的一个SDRAM 模型(verilog)-artera an SDRAM model [verilog]
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Size: 4096 |
Author: xiaoheng |
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Description: Altera 官方提供的SDRAM控制器,verilog的-SDRAM controller provided by Altera in Verilog HDL
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Size: 811008 |
Author: machenghai |
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Description: SDR SDRAM的VHDL描述,比较详细,还有数据手册-SDR SDRAM the VHDL description, more detailed, have data sheet
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Size: 717824 |
Author: 顾康 |
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Description: infra pen controller, cmos sensor control and sdram control
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Size: 50176 |
Author: byungchan |
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Description: 这个是一个基于FPGA的SDRAM控制器系统,实现对SDRAM的读写操作,用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
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Size: 2171904 |
Author: jyb |
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Description: nios ii cpu核,包含通用IO口、sdram、flash、uart-nios ii cpu、genernal io port、sdram、falsh、uart
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Size: 13319168 |
Author: 陆yong |
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Description: sdram controller vhdl
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Size: 15360 |
Author: wangxiaolong |
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Description: sdram controller 2 vhdl
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Size: 15360 |
Author: wangxiaolong |
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Description: It s a SDRAM Controller reference design. It had been tested in many projects.
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Size: 466944 |
Author: greyzhuang |
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Description: SDRAM存储器芯片,FPGA的接口控制,VHDL语言编写-SDRAM memory chips, FPGA interface control, VHDL language
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Size: 776192 |
Author: wang |
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Description: 瑞芯科技EFX400SL开发板上使用ISE创建的SDRAM控制器的工程源码-Rockchip EFX400SL technology development board created by the use of ISE projects SDRAM controller source
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Size: 13446144 |
Author: 曹晶 |
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